Data display centering and expansion system



June 14, 1966 J. J. MELIA ETAL. 3,256,516

DATA DISPLAY CENTERING AND EXPANSION SYSTEM Filed June 20, 1962 6Sheets-Sheet 1 CONSOLE 88 CONSOLE DISPLAY CENTRAL 88 COMMON PROCESSOR 9482 f 84 CONSOLE 80 106 H0 150 D/A (H4 Mfg-"M 108" 116 D/A 157p x Y x YREG REG SENS SENS EXP EXP GATES GATES k k k k k 8 8 I 94/ 150 168 x Y92/ 8] REG REG! J 140 f AREA 160 INVENTORS SEL JOHN J MELIA Y STEPHEN J.POPICK AREA BENJAMIN E. SIMPSON sgz l WALTER L.TUCHMAN 400 q 159 By 24%8 9.3

ATTORNEY June 14, 1966 J. J. MELIA ETAL 3,256,516

DATA DISPLAY CENTERING AND EXPANSION SYSTEM Filed June 20, 1962 6Sheets-Sheet 4.

KM 7811' REG 380 9 1 11 aw m f O 582" 1 X32 x4 1 1 R X186 6 8 1-0 1 ,1?11 0 X2 X4 X8 DEC DEC DEC 1110 o 0 0 0 O 0 o 111 1100 o 0 0 o O 0 0 11000 o 0 1010 o O. o 0 o o 0 101 1000 0 o 0 0 o 0 0 1000 o 0 o 0110 o 0 0 00 o o 011 0100 0 0 o 0 o O o 0100 0 0 o 0010 o o 0 0 0 0 o 001 R o o 0 o0 o 0 0 o 0 June 14, 1966 J. J. MELIA ETAL 3,256,516

DATA DISPLAY CENTERING AND EXPANSION SYSTEM Filed June 20, 1962 6Sheets-Sheet 5 FIG. 7 b

Ill O IO June 14, 1966 J. J. MELIA ETAL 3,256,516

DATA DISPLAY CENTERING AND EXPANSION SYSTEM 6 Sheets-Sheet 6 Filed June20, 1962 mm mm 5 3 mm 3 R @N @N E Q NN R 2 E E t m: 2 3 E N s mw-wmqmmUnited States Patent Ofiice 3,256,516 Patented June 14, 1966 3,256,516DATA DISPLAY CENTERING AND EXPANSION SYSTEM John J. Melia, Woodstock,and Stephen J. Popick, Kingston, N.Y., Benjamin E. Simpson, Waldron,Ark., and Walter L. T uchman, De Witt, N.Y., assignors to InternationalBusiness Machines Corporation, New York, N.Y., a corporation of New YorkFiled June 20, 1962, Ser. No. 203,823 6 Claims. (Cl. 340-1725) Thisinvention relates to data processing systems and more particularly tocenteriing and expansion means for control of data display equipment ofsuch systems.

Display systems are frequently included in data processing equipments,often for the purpose of displaying data messages which have positionalsignificance. Thus, each of a group of messages may include uniquedisplay address information, which constitutes part of the intelligenceconveyed by the message, and is determinative of the position at whichvisual symbol of the message is displayed.

It is often desired that messages be displayed on an expanded addressscale, for better observation or handling of a particular message orgroup of neighboring messages. Accordingly, means may be providedwhereby messages having addresses normally falling within a particularportion of the display area can be displayed at relocated and relativelyexpanded display addresses. By this manipulation of addresses, theportion of the display of interest is enlarged and centered, filling theavailable display area.

The display equipment in a large data processing system may include anumber of display consoles attended by individual operators. Oneoperator may wish to scrutinize one area of the display while another isinterested in a different section. Accordingly, it is often desired thatcentering and expansion means be provided which does not affectoperation of the central computer, but, rather, is individual to eachconsole and under the control of the individual operator.

A system having the aforedescribed capabilities is disclosed in GerhardtUS. Patent No. 3,011,164. Push buttons are provided by which theoperator can define the display area which is to be central andexpanded. Operation of the proper push buttons, for executing optimumcentering, is a matter of operator judgment and accuracy.

In accordance with the present invention, means are provided wherebycentering of the expanded display is automatic upon identification of amesasge of interest. The identified message becomes a key message,operative to control the centering system. Accidental expansion of theidentified message off of the display screen is impossible, and optimumcentering of that key message and its environs, within the capabilitiesof the centering circuitry, is assured.

Conveniently, the selection of the key message can be by operation of amanipulatable device which is sensitive to the display of the message,such as a so-called light gun or light pencil. Thus, the equipmentprovides the operator of the console with the desired ability to selectthe area which is to be centered and expanded, in terms of an exactmessage of interest.

Accordingly, it is a principal object of the present invention toprovide improved means for centering and expanding display information,with reference to a particular message of interest.

It is another object of the invention to provide im-- proved displayexpansion means whereby optimum centering of a given message is assured,within the limits of the centering circuitry.

Yet another object of the invention is to provide an im proved displaysystem as aforesaid, wherein operator selection of an area for centeringand expansion is facilitated.

It is another object of the invention to provide improved centering andexpanison means for use in a data processing system as aforesaid, which,by reason of its simplicity, may be incorporated individually andindependently in each display console of a multiple console system.

Another object of the invention is to provide improved centering andexpansion means as aforesaid which does not affect operation of thecentral computer or other data source.

Still another object of the invention is to provide for more accuratehandling of densely grouped display messages, such as are oftenencountered in the use of computer operated display devices.

The foregoing and other objects, features and advantages of theinvention will be apparent from the following more particulardescription of preferred embodiments of the invention, as illustrated inthe accompanying draw- 1ngs.

FIG. 1 is a block diagram of a data processing system including amulti-console display system which may advantageously embody theinvention;

FIG. 2 is a schematic representation of portions of a display console,suitable for use in a multi-console system in accordance with FIG. 1 andillustrative of a preferred embodiment of the invention;

FIGS. 3, 3a and 3b illustrate in simplified form logical circuitry ofone preferred embodiment of the invention;

FIG. 4 is a view of the display area of the display tube of FIG. 2,showing the available unexpanded mes sage positions in a version of thesystem; having three-bit binary encoded display addresses;

FIG. 5 is a view similar to FIG. 4, but showing available messagepositions after expansion of the display;

FIG. 6 shows a series of diagrams of the display area illustratingunexpanded locations of messages which may be selected and displayed atexpanded addresses by operation of circuitry of the invention;

FIG. 7 is a diagram showing the layout relationship of sheets of thedrawing bearing FIGS. 7a and 8a and FIGS. 71) and 8b;

FIGS. 7a and 7b together constitute a chart of unexpanded displayaddress group limits, pertinent to various levels of expansion;

FIGS. 8a and 8b together constitute a table of binary encoded displayaddresses for one display axis, showing significant 'bit definitions ofthe group limits of the chart of FIGS. 7a and 7b; and

FIG. 9 is a schematic representation of address group selector meansfor'use in modified systems of the invention providing multiple levelsof display expansion.

The present invention provides improvement in display systems of thekinds wherein expansion and centering capability is a desired attribute.One display system of this kind is shown in the aforementioned US.Patent No.

3 3,011,164 to R. H. Gerhardt. In certain aspects, the present inventionmay be viewed as comprising a combination with teachings of Gerhardtwhich yields improved capabilities.

It is an important attribute of the present invention that itsimprovements in centering and expansion means, like the prior teachingsof Gerhardt, may be embodied at the console level, that is, duplicatedin each console of a plural display console data processing system.Thus, each console operator is given individual, automatic controlswhich need not in their functioning affect or burden operation of thecentral processor of the system.

Accordingly, as shown in FIG. 1, a data processing system environment inwhich aspects of the present invention find advantageous use may takethe form of a digital computer or other suitable central processor 80having an output connection 82 to a display common unit 84. The displaycommon unit 84, whichmay contain suitable buffer and other interfaceequipment, feeds display message information, including display addressinformation to consoles 86, 88, 90 in parallel, as indicated at 92, 94,96, 98, 100.

The centering and expansion facilities of and at each of the consoles86, 88, 90 may take the form diagrammed in FIG. 2. The image producingdevice at the console may be, for example, a shaped beam cathode raytube 110 of the kind having a cathode 112, and electron beam blankingcontrol grid 114, accelerating and focusing anodes 116, characterselection deflection plates 118 and a cooperating character shapeforming aperture matrix 120, a convergence coil 122 and compensationplates 124 for realigning the shaped electron beam axially of the tube,X and Y electro-magnetic deflection yoke means 126, a phosphor screen atthe face 128 of the tube, and a post acceleration high voltage anode130.

In a display system of the kind diagrammed in FIGS. 1 and 2, the displaysignals furnished by the display common unit 84 to the several consolesmay take the form of a succession of binary encoded multi-bit wordsidentifying each message as it is displayed, with the message comprisinga particular character of the character matrix of the shaped beamcathode ray tube 110 together with the address on the screen 128 of thecathode ray tube at which that character is to be displayed. Othercommand information may be transmitted from the display common equipment84 to the consoles, such as a timing signal operative to switch thevoltage level on the control grid 114 of the cathode ray tube from itsblanking to its unblanking level, so as to gate the electron beam ononly after the character selection and message deflection circuitry hassettled. Accordingly, the input connections to the console of FIG. 2 mayinclude a line 92 for the blank-unblank signal, and channels 94, 96having two lines per hit for each of the several bits constituting themessage word portion'representative of the matrix 120 X and Y addressesof the character to be displayed. Another channel 98 includes a numberof conductor pairs for transfer of the binary encoded X display screenaddress at which the character is to be shown, while a fifthmulti-conductor channel 100 contains conductor pairs for the Y displayaddress portion of the message word. The message word bits could betransmitted to the console in the form of levels; however, it isfrequently more convenient to effect this command and message transferin the form of pulses and therefore the schematic of FIG. 2 showsregisters for local storage of the information during the display of thesuccessive messages.

Accordingly, channels 94, 96 are connected to character informationstorage registers 104, 105 which provide levels for operation of thecharacter select plates 118 through suitable decoder or digital to.analog converter units 106, 108. The X display address or X axis message positioning information supplied in pulse form via the conductorchannel 98 is stored in register 132, whence it is supplied in levelform through expansion circuitry 134 and decoder 136 to the X axisportion of the deflection yoke 126. In like manner, the Y axis messagepositioning information from conductor channel or' group is stored inregister 140 during the display of the character called for by themessage, the level-form, binary encoded Y display address informationprovided by register 140 being operative through expansion circuitry 144and Y axis decoder 146 to operate the Y axis portion of the deflectionyoke 126.

The expansion circuitry of the illustrated embodiment of the inventionoperates, as detailed in FIGS. 3, 3a and 312, by altering or shiftingthe significance of the bit posi tions of the binary encoded displayaddress information. Since this results in the loss of the mostsignificant bit in each of the X and Y display address word portions,superposition or original (unexpanded) display areas would result werenot means provided to suppress all but a selected group of messages..Thus, the area-of-interest control circuitry includes an X axis sensor150 and a Y axis sensor 152, the outputs-of which, together with theblank-unblank timing signal on line 92 are connected to an AND circuit154. The output of the AND circuit 154 is communicated via line 157 tothe control grid 114 of the display tube, and is at a level to unblankor intensity the electron beam of the display tube only during thesimultaneous presence of an unblank-significant level on line 92 andfrom the outputs of the sensor circuits 150 and 152.

Moreover, operation of the scheme of FIGS. 3, 3a and 3b in the literalexpansion of certain areas of the original display, hereinafter referredto as overlap areas involves complementing a certain address bit.Accordingly, identification of the area of interest is desired foraddress data manipulation, as Well as spurious message suppression.

In accordance with the present invention, means are provided wherebyidentification and selection of the address group corresponding to thearea of interest is affected automatically upon identification of aparticular address of interest. Advantageously, this address may be anyaddress in the display area and may be derived from an operator-selectedone of the information messages fed to the console, by means which areoperable by and upon the display of that message. Accordingly, once amessage has been selected for area of interest identification purposesit becomes a key message and its address is referred hereinafter as thekey message address.

The illustrated embodiment of the invention includes area of interestselection circuitry 158, 159 which is responsive, not only to the keymessage address but also to expansion level command means such as amanually operable expansion level control switch 160, to provide area ofinterest control information to the X and Y sensing circuits 150, 152.This information is also fed to the expansion circuitries 134, 144, forcontrol of address manipulation required in the expanded display ofoverlap areas, as hereinafter more fully described.

For the purpose of making the key message address available to the areaof interest control circuitry 158, 159, the illustrated embodiment ofthe invention includes registers 162, 164 and means responsive tooperator identification of a key message to store the address of thatmessage in these key message address registers. These means includegates 166, 168 which are conditioned as shown by the outputs of the Xand Y display address registers 132, 140, and an operator manipulatablesensing device such as a photocell device 170. The photocell device 170is operable to provide a pulse on its output line 172 to sample thegates 166, 168 in timed coincidence with the display of a message whosedisplay address is at the moment present in the X and Y display addressregisters 132, 140. The photocell device 170 may take the form shown inUS. Patent No. 2,915,643, issued December 1, 1959 in the name of R. G.Mork. This kind of device is known to the art as a light gun or lightpencil and may be provided with a trigger switch 173 for enabling theoutput of its photocell. Thus, the operator positions the devicerelative to the screen of the display tube 110 for receipt of andactivation by the light of the message in which he is interested. Hethen closes the trigger switch 173, and the time coincidence of theresulting pulse on line 172 with the address in registers 132, 140,serves to identify that address as the key message address.

FIGS. 3, 3a and 319 show in simplified form circuitry which is operativeto select and manipulate X axis display addresses in the manneraforedescribed. Except for the expansion level select switch 160 and thephotocell device 170, which are common to the X and Y axis selection andexpansion systems as indicated in-FIG. 2, the circuitry of FIGS. 3, 3aand 3b is duplicated for the Y axis and therefore a detailed showing ofthe Y axis circuitry is not included. Joint operation of the circuitryof FIGS. 3, 3a and 3b with the substantially identical Y axis selectionand ex ansion circuitry effects the desired selection and expansion of adisplay address groups as indicated in FIGS. 4, 5 and 6.

FIG. 4 shows an array of available message display addresses in theunexpanded display, and FIG. 5 shows certain of those addresses whichhave been selected to the exclusion of the rest, and reoriented on adoubled scale. FIG. 6 shows areas of the FIG. 4 display which may beselected for expansion by operation of the X axis circuitry of FIGS. 3,3a and 3b and its companion Y axis circuitry. These areas fall into twomajor classes, quadrant areas 180, 182, 184 and 186, and overlap areas188, 190, 194, 196 and 198. The address groups of quadrant areascomprise integral divisions of each display axis; In the overlap areas,at least one axis address group is :a non-integral or overlap divisionof that axis. When considering the X axis alone, these address groupsmay be termed left side 180, 182, 188, right side 184, 186, 190, andoverlap 194, 196, 198 address groups.

It will be observed that doubling the display scale of a quadrant areamay be accomplished by discarding the most significant bit in each ofthe X and Y addresses, shifting those addresses so as to multiply thesignificance of each of the remaining bits by two, and suppressing thedisplay of all messages having original addresses falling outside thequadrant selected. In the expansion of any one of the overlap squares188, 190, 194, 196 or 198, however, there is the additional step ofcomplementing the most significant bit in the expanded X address or Yaddress or both.

In other words, considering for simplicity only the X axis, the secondand third most significant bits in the addresses, 000, 001, 010, and'Ollrepeat in the same order in the addresses 100, 101, 110 and 111. Thus,centered and expanded display of either first (left) half or the second(right) half of the original address range can be effected by simplydiscarding the most significant bit and shifting the remaining bits oneposition so as to donble their numerical weight. On the other hand,expansion and centering of the message positions having originaladdresses of 010, 011, 100 and 101 involves not only the foregoingshifting and bit dropping steps but also the step of complementing themost significant bit in the expanded address; thus, the original messageaddress of 010 is re-oriented to location 000, and so on.

In the embodiment shown in FIGS. 3, 3a and 3b, the aforedescribed bitshifting and manipulating steps are performed by expansion circuitry 134under the control of relays 200, 202, the control inputs or armatures ofwhich constitute part of the address group selection circuitry 158. Ifthe expansion select switch 160 is in its normal, open position, relay200 is de-energized, whereby its contacts 200-1, 2002 and 200-3 are intheir closed position. Thus, the 1 significant level output lines 206,208, 210, of flip-flops 214, 216, 218 in the X display address register132 are connected in straight-through re- 6 lationship to the inputchannels 220, 222, 224 of the X display address decoder 136. As shown,the decoder 136 may be of the kind comprising current gates 226, 228,230 connected to be conditioned by a l significant level on thecorresponding input channel line 220, 222, 224, and when conditioned, topass currents from corresponding constant current sources 232, 234, 236to a binary weighted attenuation network 238. The decoder 136 is thus adigital to analog converter which receives a binary encoded digitaladdress on lines 220, 222, and 224 and yields an analog voltageequivalent of that address. The analog output lines 240 of the decoder136 are connected, as shown in FIG. 1, to the deflectionyoke 126 of thedisplay tube 110.

Accordingly, when the expansion level switch 160 is in its times one(open) position X1, each successive X address stored in the register 132is operative to energize the X portion of the deflection yoke 126 of thedisplay tube 110 with an analog signal corresponding to the value ofthat X address. The effect of this analog energization of the yoke 126is added to the effect of bias means (not shown) which cause thequiescent or rest position of the electron beam of the display tube tobe atan X, Y address of 000, 000 identified by the letter R in FIG. 4.Accordingly, utilization of three hits in the X address register 132, asshown in FIG. 3 can cause the electron-beam of the display tube 110 tobe deflected to any of the X axis address values shown in FIG. 4.

If the expansion level select switch is moved to its closed or X2position, for the production of a display having a times two expansion,the solenoid of'relay 200 is energized, by the power of a suitablevoltage supply (not shown) connected to supplies terminal 242, 244. Thisaction opens relay contacts 200-1, 200-2, 200-3 and closes normally opencontacts 2004 and 2005 of relay 200, thereby connecting outputs of thesecond and third most significant flip-flops 216, 218 of the X addressregister 132 to the first and second most significant input channels220, 222 of the decoder 136. This accomplishes the desiredmultiplication of the weight of the address by a factor of two.

It will be recalled that it was stated that in the cases of expansion.and centering of overlap address groups it is necessary, when using thecentering and expansion scheme detailed herein, to complement the bitsupplied to the most significant input channel 220 of the decoder 136.In the circuit of FIG. 3b, this is accomplished for the X axis byoperation of relay 202. If one of the overlap portions 194, 196 or 198of FIG. 5 is selected 7 for display, relay 202 is energized therebyopening its normally closed contact 2021 and closing its normally opencontact 2022 so as to disconnect the 1 significant line 208 of flip-flop216 from the decoder 136, and to connect the 0 output line of thatflip-flop in its stead.

Referring again to FIGS. 4 and 6, it will be recalled that allunexpanded X addresses falling in any of the lefthand areas 180, 182,188 have a most significant bit of 0, while the X addresses falling inany of the righthand areas 184, 186, 190 begin with a most significantbit of 1. Accordingly, when a lefthand area is to be displayed on adoubled scale, messages having X axis display addresses in the register132 which have a most significant bit of 0 are legal and are to bedisplayed, while those addresses starting in a l are illegal andidentify an unwanted message. Conversely, if messages whose X addressfalls in one of the squares 184, 186 or 190 are to be displayed on theexpanded address scale, then original message addresses in the register132 beginning in a 1 are legal and those beginning in a 0 are illegal.However, in the case X axis overlap squares 194, 196 and 198, it isnecessary to sense the first two hits since addresses beginning ineither 01 or 10 are legal.

The X axis sensing circuit 150 performs the abovedescribeddiscrimination between legal and illegal addresses. If messages havingaddresses falling within one of the lefthand squares of the unexpandeddisplay are to be shown on the doubled scale, relay 250 is energizedthereby closing its normally open contact 250-1 which connects the sideof the most significant flipflop 214 in the register 132 to an ANDcircuit 260. The other input 262 of AND circuit 260 is energized from asuitable voltage source 264, through normally closed contact 202-3 ofrelay 202, and lines 266 and 268.

If all X axis addresses beginning in their unexpanded form in a l are tobe legal, relay 252 is energized whereby the 1 side of the flip-flop 214is connected, via line 270 and contact 252-1 of relay 252 to another ANDcircuit 272. The other input 274 of AND circuit 272 is energizedfrom-the source 264, through normally closed contact 202-3 and line 226.

If only those X axis addresses beginning in their unexpanded form withthe bits 01 or 10 are to be legal, relay 202 is energized. Energizationof relay 202 operates to close its contacts 202-4, 202-5, 202-6 and202-7, and to open its contact 202-3. Thus, if the contents of the twomost significant flip-flops 214, 216 of the register 132 are 0 and 1respectively, a level is communicated from the O side of flip-flop 214via line 280 contact 250-1 and line 258 to one input of AND circuit 260,while the other side of the same AND circuit 260 is energized from the 1side of the second flip-flop 216, via line 208, line 282, contact 202-6and line 262. If the address bits stored in flip-flops 214, 216 are 1and 0, respectively, AND circuit 272 is energized via lines 206, 270 andcontact 202-4, and by lines 204, 236 contact 202- and line 274.

Relays 202, 250, and 252 are interlocked with the expansion level selectrelay 200 by means of normally open contacts 200-6, 200-7, 200-8 of thatrelay, so as to be de-energized whenever the expansion level selectswitch 160 is in its X1 position and relay 200 is thereby de-energized.Furthermore, relay 200 has a normally closed contact 200-9 whichconnects voltage supply 264 to line 288 whenever relay 200 isde-energized.

Line 288 and the output lines 290 and 292 are connected via an ORcircuit 294 to a line 296 which constitutes the output of the X axisaddress sensing circuit 150 and is connected as shown in FIG. 2 to theintensification control AND circuit 154 of the display tube 110.

Accordingly, the X display sense circuit 150 of FIG. 3b is operative tosupply a significant level on line 296 Whenever the expansion levelselect switch is in its X1 position, irrespective of the contents ofregister 132; however, when level select switch 160 is in its X2position a significant level appears on line 296 only when the addressin register 132 is a legal one.

In accordance with the present invention the area or address groupselect circuitry 158 of FIG. 2 includes means responsive to thedetection of the display of a message of interest by the photocelldevice 170, to energize the appropriate one of relays 202, 250, 252 forselecting automatically the most appropriate X axis address group forexpansion. Since adjacent address groups available for expansion overlapeach other, it is desirable that there be selected for expansion thataddress group which not only includes the address of the message ofinterest but also will center that message most nearly in the expandeddisplay.

Referring to FIG. 4, it will be seen that a message of interest havingan X axis address of O00, 001 or 010! will be most effectively centeredin the expanded display if the lefthand X axis address group consistingof 000, 001, 010, and 011 is selected for expansion, that is, if relay250 of FIG. 3b is energized.

If the message of interest has an original address of 011, however,selection of the lefthand address group would be less appropriate sincesuch a message, when displayed on an expanded address scale, wouldappear at an address of 110, near the high-hand edge of the display 8screen. It would be more appropriate that the overlap address group ofO10, 011, 100, 101 be selected, since this would put the message ofinterest nearer to the center of the display screen, at a screen addressof 010. In other words, it would be more appropriate that relay 202 beenergized.

It will be seen, then, that while two bits are sufiicient to establishthe legality of a display address in one axis as abovedescribed, anextra bit is required to identify which of two overlapping availableaddress groups is most appropriate to the display of certain messages ofinterest. In the production of an expanded display by operation of thecircuitry of FIGS. 3, 3a and 312 it is most appropriate that relay 250be energized if the message of interest has an X axis address of 000,001, or 010; that relay 202 be energized if the message of interest hasan X axis address of 011 or and that relay 252 be energized if themessage of interest has an axis address of 101, 100 or 111. Accordingly,selection of the appropriate address group select relay 202, 250, 252can be accomplished by decoding the most significant three hits of thekey message of interest, the display of which has been detected by thephotocell device 170 as described above in connection with FIG. 2.

In FIG. 3a the photocell device 9170 is shown to comprise a photocell300, an amplifier 302 and the trigger switch 173 of the device. When thedisplay of a message is detected by the device, an output pulse appearson line 172 and is conveyed by connection terminal 304 to the samplinginput line 306 of the key message address gates 166 of the X axiscircuitry. The pulse on line 172 is supplied also to terminal 308 whenceit is conveyed to the Y axis circuitry which, again, is substantiallyidentical to the X axis circuitry and is therefore not shown in FIG. 3a.5;

In the circuit configurations shown, the X axis key message address gate166 comprises individual gate circuits 310, 312, 314, 316, 318, 320connected via lines 322, 324, 326, 328, 330, 332 to be conditioned bythe outputs of flip-flops 214, 216, 218 of the X message addressregister 132. These gate circuits are operative to effectnon-destructive, double line transfer of the contents of the register132 to the key message address register 162 by and uponthe appearance ofa sampling pulse on line 306. The sampling pulse on line 306 resultsfrom the detection of the display of the message of interest, that is,the key message, by response of the photocell 300 to the light of thedisplay of that message. The X axis address of that message is presentin the X axis address register :132 during that display. Therefore, theforegoing operation results in preservation of that address in theregister 162. The level outputs of the key message address register 162flip-flops 310, 312, 314, 316, 318, 320 are connected as shown to ANDcircuits 340, 342, 344, 346, 348 and 350. AND circuit 340 is connectedto be conditioned by the presence of a 1 stored in flip-flop 334concurrently with a l stored in flip-flop 336. This AND circuit 340 isnot connected to flip-flop 338 and therefore passes a signal wheneverthe address stored in register 162 is or 111. Accordingly, the addresseswhich will energize AND circuit 340 may be written as I l-f AND circuit342 is connected to be responsive to an address of 101, circuit 344 toan address of 100, circuit 346 to an address of 011, circuit 348 to anaddress of "010," and circuit 350 to addresses of 000 or 001 or, inother words, 00-.

The outputs of circuits 340 and 342 are combined by an OR circuit 352which thereby yields an output on line 358 whenever the contents of thekey message address register 162 are "101, 110 or 111. It will berecalled that these are the three addresses that make it mostappropriate that relay 252 be energized during presentation of a displayon an expanded scale. Accordingly, line 358 is connected, throughcontact. 200-8 (which is closed when an expanded display is beingpresented), to the input of relay 252.

Similarly, the output of OR circuit 354 is connected via line 360 toenergize relay 202 when the contents of the key message address register162 are 011 or 100. Finally, the output of OR circuit 356 is connectedvia line 362 for energization of relay 250 when the contents of theregister 162 are 000, 001, or 010.

The foregoing scheme of circuit organization and mode of operation canbe extended with facility for embodiment in display systems having manymore address bits in each axis than the three shown in FIGS. 3, 3a and3b and many more available levels of expansion than the times one andtimes two choices X1 and X2 shown in that figure. It will be understoodthat any number of lower order bit significant flip-flops can be addedto the register 132, with corresponding addition of channels in thedecoder 136 and shifting selection means analagous to contacts 200-3 and200-5. Higher levels of expansion can be enabled by providing cross-overconnections similar to those controlled by contacts S2004 and 200-5 foreffecting a shift of two bit positions for times four expansion, threebit positions for times eight expansion, and so on. Of course, as thelevel of expansion is increased, the areas which may be selected forexpansion become different and smaller divisions of the originaldisplay. Progressively lower order bits of the original addresses becomethe most significant bit in the expanded address and requirecomplementing means.

FIGS. 7a and 7b constitute a diagram of one display axis, showingaddress boundaries pertinent to the selection of the most appropriatesquare or address group for expansion factors of two, four, eight,sixteen and thirtytwo. Also shown are the address group boundaries forintegral and overlap divisions of the axis for those levels ofexpansion. This chart may be correlated to the diagrams of FIG. 6 byobserving that the integral division 1-33 in FIG. 7a represents the Xaxis interval corresponding to areas 180, 182, and 188 in FIG. 6, andthe Y axis interval corresponding to areas 180, 184 and 194 in thatfigure. Overlap division 17-49 in FIGS. 7a and 7b corresponds for the Xaxis to FIG. 6 areas 194, @196, 198 and for the Y axis to areas 188,190, 198. Integral division 33-65 in FIG. 7b corresponds for the X axisto FIG. 6 areas 184, 186, 190 and, for the Y axis, to areas 182, 186 and196 in FIG. 6.

The chart of FIGS. 7a and 7b shows the manner in which the same schemeis carried to higher levels of expansion. For example, in the case oftimes sixteen expansion, the integral divisions or address groupsavailable for display are bounded by lines 1, 5, 9, 13, 17 and so on,while the overlap groups are bounded by lines 3, 7, 11, 15, 19 and soon. If a key message address falls between boundary lines 1 and 4, then.the address group bounded by lines 1 and 5 is the most appropriate; ifthe address falls between boundaries 4 and 6, then the overlap addressgroup bounded by lines 3 and 7 is most appropriate; if the key messageaddress falls between boundaries 6 and 8, then the next integral addressgroup bounded by lines 5 and 9 is most appropriate; if the key addressfalls between boundaries 8 and 10, then the next overlap address groupbounded by lines 7 and 11 is most appropriate, and so on.

FIGS. 80 and 8b constitute a table showing seven bit, binary encodeddisplay addresses corresponding in FIGS. 70 and 7b to the boundaries 2,3 through 64, and mid-points or interpolations between those boundaries(2.5 through 63.5). The closest seven bit approach to boundary line 1 is0000000 and the closest seven bit ap-v dress group for centering andexpansion, at expansion levels of times two, times four, times eight,times sixteen, and times thirty-two. The boundaries are the numberedlines (and, in the case of times thirty-two expansion, the unnumberedmid-points between them) of FIGS. 7a and 7b, and the addresses are thecorresponding addresses of FIGS. 8a and 8b. Bits which are notsignificant for key message purposes, that is ones which do not afiectthe division selection are shown by a dash,

TABLE I Integral Divisions Overlap Divisions Expansion Display KeyAddress Display Key Address Factor Axis Axis Division Division Bound-Bound- Signifi- Bound- Bound- Signifiarles aries cant; aries aries cantBits Bits Table I is carried to only three successive display axisdivisions although in every case save times two (X2) expansion there areadditional divisions defined by FIGS. 7a and 7b and 8a and 8b. Forexample, in the case of X32 expansion, there are-thirty-two integraldivisions plus thirty-one overlap divisions.

In every expansion level, the lower boundary of the key address for theaxis division beginning at boundary 1 is l, and the upper boundray ofthe key address for the axis division ending at boundary 65 is 65, sincethere is no overlap division required at either end of the axis. Forthis reason, the key message addresses defining these extreme boundarieshave one less significant bit than the other key message .addressemployed in the same expansion level. For example, at times two, thelowest and highest key message boundaries have two significant bits; allthe others in the same expansion level have three.

Table II shows the number of high order binary bits pertinent toselection of an address group for display.

TABLE II Expansion Factor X2 X4 X8 X16 X32 Significant binary bits todefine integral division 1 2 3 4 5 Significant binary bits to defineoverlap divisions 2 3 4 5 6 Significant binary bits to select mostappropriate division in system having mtegral and overlap divisions-.. 34 5 6 7 FIG. 9 shows, schematically, address group selector means forone axis, analogous to the key message decoder means of FIG. 3 butadapted to eifect selection of the most appropriate address group fordisplay of a key message and its environs at a plurality of levels ofexpansion, in accordance with the criteria shown in FIGS. 7a and 7b andFIGS. 80 and 8b and Tables I and II.

Since expansion levels to times thirty-two (X32) are shown, the keymessage address register 162' has facilities for storing seven numericalorders. In the illustrated embodiment, it is a seven bit binary registerhaving two line per bit output via the cable 380. A first branch 382 ofthe cable 380 feeds a decoder 384 through a six contact, normally openrelay 386. The decoder 384 may be identical to the key address AND, ORdecoder organization 340, 342, 346, 348, 350, 352, 354, 356 of FIG. 3a,and has a three-line output cable 388 identical in function to theoutput on lines 358, 360, 362 of FIG. 3a. Additional decoder means 390,392, 394, 396 respond to four, five, six, and seven high order bits fromthe key message address register 162; as hereinabove explained, whencalled into action by corresponding normally open relays 398, 400, 402,406.

Switch 160 may be ganged with expansion level select switch meansanalogous to switch 160 of FIG. 3b to effect the correspondingexpansion, as hereinabove described, as switch 160 is turned to one oranother of its positions X2, X4, etc. When turned to one of thosepositions, switch 160' is operative to energize and close .thecorresponding relay 385, 398, 400, 402 or 406, whereby an output whichis unique to the address group most appropriate for expansion anddisplay appears on a unique one of the lines in one of the decoderoutput cables 388, 408, 410, 412, 414, for operation of sensing andcomplementing circuitry analogous to the circuit means 150, 202-1, 202 2of FIG. 3b.

It will be observed that in the illustrated embodiments of theinvention, the key message address or area select AND-OR decoder meansis interlocked with and thus programmed by the expansion select switch,and, in turn operates to program the legal address sensing AND-ORdecoder means.

The AND and OR components of the area select decoder may be of the samegeneral kind as the legal address sensing decoder. Any suitable kinds ofcomponents may be used for these purposes in accordance with therequired speed of operation of the system, cost and other factors. Forexample, the afore-referenced Gerhardt patent refers to component kindswhich are in many instances suitable for these and other parts of thesystem.

Although FIG. 9 shows, for schematic clarity, separate decoders forvarious levels of expansion, permutations (e.g. 000, 001, 010, etc.) mayreadily be made available from the area or axis division select decodersfor lower levels (e.g. X2) of expansion for use in the decoding ofadditional bits or digits for employment in the decoding for higherexpansion levels. This kind of decoder is sometimes called a treedecoder.

The key message registers may be constructed as counters so thatinformation therein may be stepped up or down to change the displayaddress group selection from the original display. Another register maybe employed in each case to retain the original key message address, toenable the returning of the key message register to its former.contentafter that stepping operation.

While the invention has been particularly shown and described withreference to preferred embodiments thereof, it will be understood bythose skilled in the art that the foregoing and other changes in formand details may be made therein without departing from the spirit andscope of the invention.

What is claimed is:

1. In a data processing system,

display means,

and means foroperatively supplying to said display means successivegroups of signals representing messages and digital display addressesrelated thereto,

said display means having a display screen,

said addresses occurring along an axis of said screen divisable evenlyinto consecutive address groups comprising integral divisions of saidaxis,

means operative to provide a digital key address rep presentative of apositional value on said screen,

expansion level control means,

message display selection means comprising logical decoder meanssensitive to a high order portion of said key address to define anaddress decision interval of which the key address is a member, saidlogical decoder means being operative to permit display of only thosemessages whose unaltered address equivalent contains high order bitsdefining a display interval containing said decision interval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses n orders and to deleteit high order bits thereof, wherein n is the power to which expansion isto be effected.

2. In a data processing system which includes display means and meansfor operatively supplying to said display means successive groups ofsignals representing messages and diigtal display addresses relatedthereto,

a display console comprising, i

a first register connected to receive said addresses in succession,

key message select means operable to identify a particular one of saidgroups of signals by its display address,

a second register,

control means connected to said first register and responsive to saidkey message select means for controlling the transfer of the key addressfrom said firstregister into said second register,

expansion level control means,

said addresses occurring along an axis divisable evenly into consecutiveaddress groups comprising integral divisions of said axis, and intooverlap divisions of the same size centered on the boundaries of saidintegral divisions,

message display selection means comprising logical decoder meanssensitive to it plus two high order bits of said key address, wherein nis the power to which expansion is to be effected, to define an addressdecision interval of which the key address is a memher, said logicaldecoder means being operative to permit display of only those messageswhose unaltered address equivalent contains 21 plus one high order bitsdefining a display interval larger than and containing said decisioninterval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses 1: orders and to delete12 high order bits thereof,

said centering and expansion means being responsive to detection of anoverlap division selection by said selection means additionally tocomplement the highest order remaining bit of the addresses of themessages to be displayed.

3. In a data processing system,

display means,

and means for operatively supplying to said display means successivegroups of signals representing messages and digital display addressesrelated thereto,

said display means comprising address input means connected to receivesaid addresses in succession,

a manipulatable sensing device adapted to produce a signal by and uponthe display of a message selected thereby,

a register,

control means connected to said address input means and responsive tothe signal produced by said sensing device for controlling the transferof information from said address input means into said register toconstitute a key address therein,

expansion level control means,

said addresses occurring along an axis divisable evenly into consecutiveaddress groups comprising integral divisions of said axis, and intooverlap divisions of the same size centered on the boundaries of saidintegral divisions,

message display selection means comprising a logical decoder sensitiveto at least 11 plus one high order bits of said key address, wherein nis the power to which expansion is to be effected, to define an addressdecision interval of which the key address is a member, said logicaldecoder means being operative to permit display of only those messageswhose unaltered address equivalent contains n plus one high order bitsdefining a display interval containing said decision interval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses 22 orders and to deleteit high order bits thereof,

said centering and expansion means being responsive to detection of anoverlap division selection by said selection means additionally tocomplement the highest order remaining bit of the addresses of themessages to be displayed.

4. In a data processing system,

display means comprising a plurality of display consoles and means foroperatively supplying to said display consoles in parallel successivegroups of signals representing messages and digital display addressesrelated thereto,

each of said display consoles comprising address input means connectedto receive said addresses in succession,

a manipulatable sensing device adapted to produce a signalby and uponthe display of a message selected thereby,

a register,

control means connected to said address input means and responsive tothe signal produced by said sensing device for controlling the transferof information from said address input means into said register toconstitute a key message address therein,

expansion level control means,

said addresses occurring along an axis divisable evenly into consecutiveaddress groups comprising integral divisions of said axis, and intooverlap divisions of the same size centered on the boundaries of saidintegral divisions,

message display selection means comprising logical decoder meanssensitive to n plus two high order bits of said key address, wherein nis the power to which expansion is to be elfected, to define an addressdecision interval of which the key address is a member, said logicaldecoder means being operative to permit display of only those messageswhose unaltered address equivalent contains n plus one high order bitsdefining a display interval larger than and containing said decisioninterval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses n orders and to deleten high order bits thereof,

said centering and expansion means being responsive to detection of anoverlap division selection by said selection means additionally tocomplement the highest order remaining bit of the addresses of themessages to be displayed.

5. In a data processing system which includes display means and meansfor operatively supplying to said display means successive groups ofsignals representing messages and digital display addresses relatedthereto,

a display console comprising,

address input means connected to receive said addresses in succession,

a manipulatable sensing device adapted to produce a signal by and uponthe display of a message selected thereby,

a register,

control means connected to said address input means and responsive tothe signal produced by said sensing device for controlling the transferof information from said address input means into said register toconstitute a digital key address therein,

expansion level control means,

said addresses occurring along an axis divisable evenly into consecutiveaddress groups comprising integral divisions of said axis, and intooverlap divisions of the same size centered on the boundaries of saidintegral divisions,

message display selection means comprising logical decoder meanssensitive to n plus two high order bits of said key address, wherein nis the power to which expansion is to be effected, to define an addressdecision interval of which the key address is a member, said logicaldecoder means being operative to permit display of only those messageswhose unaltered address equivalent contains n plus one high order bitsdefining a display interval larger than and containing said decisioninterval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses n orders and to deleteit high order bits thereof,

said centering and expansion means being responsive to detection of anoverlap division selection by said selection means additionally tocomplement the highest order remaining bit of the addresses of themessages to be displayed.

6. In a data processing system which includes display means and meansfor operatively supplying to said display means successive groups ofsignals representing messages and binary encoded digital displayaddresses related thereto,

a display console comprising,

a first register connected to receive said addresses in succession,

a manipulatable sensing device adapted to produce a signal by and uponthe display of a selected message,

a second register,

control means connected to said first register and responsive to thesignal produced by said sensing device for controlling the transfer ofinformation from said first register into said second register toconstitute a key address therein,

expansion level control means,

said addresses occurring along an axis divisable evenly into consecutiveaddress groups comprising integral divisions of said axis, and intooverlap divisions of the same size centered on the boundaries of saidintegral divisions,

message display selection means comprising logical decoder meanssensitive to n plus two high order bits of said key address, wherein nis the power to which expansion is to be effected, to define anaddress'decision interval of which the key address is a member, saidlogical decoder means being operative to permit display of only thosemessages whose unaltered address equivalent contains n plus one highorder bits defining a display interval larger than and containing saiddecision interval,

and centering and expansion means comprising controllable means to shiftthe weight significance of the message addresses n orders and to deleten high order bits thereof,

said centering and expansion means being repsonsive 3,256,516 15 16 todetection of an overlap division selection by said 3,037,192 5/1962Everett 340 -172.5

selection means additionally to complement the highest order remainingbit of the addresses of the mes- ROBERT BAILEY Primary Examiner sages tobe displayed.

5 References Cited by the Examiner MALCOLM A. MORRISON, Examiner.

UNITED STATES PATENTS P. L. BERGER, Assistant Examiner. 3,011,16411/1961 Gerhardt 340-324.1

1. IN A DATA PROCESSING SYSTEM, DISPLAY MEANS, AND MEANS FOR OPERATIVELYSUPPLYING TO SAID DISPLAY MEANS SUCCESSIVE GROUPS OF SIGNALSREPRESENTING MESSAGES AND DIGITAL DISPLAY ADDRESSES RELATED THERETO,SAID DISPLAY MEANS HAVING A DISPLAY SCREEN, SAID ADDRESSES OCCURRINGALONG AN AXIS OF SAID SCREEN DIVISABLE EVENLY INTO CONSECUTIVE ADDRESSGROUPS COMPRISING INTEGRAL DIVISIONS OF SAID AXIS, MEANS OPERATIVE TOPROVIDE A DIGITAL KEY ADDRESS REPPRESENTATIVE OF A POSITIONAL VALUE ONSAID SCREEN EXPANSION LEVEL CONTROL MEANS, MESSAGE DISPLAY SELECTIONMEANS COMPRISING LOGICAL DECODER MEANS SENSITIVE TO A HIGH ORDER PORTIONOF SAID KEY ADDRESS TO DEFINE AN ADDRESS DECISION, INTEVAL OF WHICH THEKEY ADDRESS IS A MEMBER, SAID LOGICAL DECODER MEANS BEING OPERATIVE TOPERMIT DISPLAY OF ONLY THOSE MESSAGES WHOSE UNALTERED ADDRESS EQUIVALENTCONTAINS HIGH ORDER BITS DEFINING A DISPLAY INTERVAL CONTAINING SAIDDECISION INTERVAL AND CENTERING AND EXPANSION MEANS COMPRISINGCONTROLLABLE MEANS TO SHIFT THE WEIGHT SIGNIFICANCE OF THE MESSAGEADDRESS N ORDERS AND TO DELETE N HIGH ORDER BITS THEREOF, WHEREIN N ISTHE POWER TO WHICH EXPANSION IS TO BE EFFECTED.